M.Tech. VLSI Design & CAD:ASICs and FPGAs

Master

In Patiala

Price on request

Description

  • Type

    Master

  • Location

    Patiala

Facilities

Location

Start date

Patiala (Punjab)
See map
Thapar University P.O Box 32, 147004

Start date

On request

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Course programme

First Semester I

Physics of Semiconductor Devices
IC Fabrication Technology
Digital VLSI Design
CAD Systems Environment
Research Methodology


Second Semester

Analog IC Design
Hardware Description Languages
Embedded Systems


Third Semester

Seminar
Thesis starts

Fourth Semester

Thesis


ASICs and FPGAs


Introduction: course outline, logistics introduction to ASICs, FPGAs, economics

HDL: Logic design Review, Behavior, dataflow, structural modeling, control statements, FSM modeling

CMOS Review: Classical, CMOS (Deep Sub-micron), ASIC Methodologies (classical) ASIC Methodologies (aggressive)

Fabrication of MOSFET: MOS Transistor, Design methodologies, design for manufacturability and testability.

FPGA: Programmable logic FPGA, Configuration logic blocks, Function Generator, ROM implementation, RAM implementation, time skew buffers, FPGA Design tools, Network-on-chip, Adaptive System-on-chip, AES ASIC Implementation, Advanced FPGA Design

Logic synthesis: Fundamentals, logic synthesis with synopsis, physical design compilation, simulation, implementation. ? Floor planning and placement, Commercial EDA tools for synthesis.

Testing: Advanced interconnects and testing techniques

M.Tech. VLSI Design & CAD:ASICs and FPGAs

Price on request