M.Tech. VLSI Design & CAD:VLSI Testing and Design for TestabilityThapar University
Price on request
First Semester I
Physics of Semiconductor Devices
IC Fabrication Technology
Digital VLSI Design
CAD Systems Environment
Analog IC Design
Hardware Description Languages
VLSI Testing and Design for Testability
Physical defects and their modeling; stuck at faults; Bridging Faults; Fault collapsing.
Fault Simulation: Deductive, Parallel and Concurrent; Critical Path Tracing.
Test Generation for Combinational Circuits: D-Algorithm, Boolean Difference, PODEM, and ATPG.
Random, Exhaustive and Weighted Random Test Pattern Generations Aliasing and its effect on Fault coverage.
PLA Testing: cross-point Fault Model, Test Generation,
Memory testing: Permanent Intermittent and Pattern Sensitive Faults; Delay Faults and Hazards; Test Generation Techniques;
Test Generation for Sequential Circuits.
Scan Design. Scan path and LSSD, BILBO,
Concept of Redundancy, spatial redundancy, Time redundancy
Recent trends in VLSI testing: Genetic Algorithms, Parallel Algorithms, Neural networks, nano scale testing.