M.Tech - VLSI Design

Bharat University
In Chennai

Price on request
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Important information

  • Master
  • Chennai
  • Duration:
    2 Years

Important information

Where and when

Starts Location
On request
# 173 Agharam Road Selaiyur, 600073, Tamil Nadu, India
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Course programme

Semester I:

PMA105 Applied Mathematics for Electronics Engineers
PVL101 Solid State Device Modeling and Simulations
PVE102 Advanced Digital System Design
PVL102 Introduction to VLSI Design
PVL1E1 Elective-I
PVl1L1 VLSI Design Lab-I

Semester II:

PVE201 Analysis and Design of Analog Integrated Circuits
PAE202 Computer Architecture and Parallel Processing
PVL201 Computer Aided Design of VLSI Circuits
PVL2E2 Elective-II
PVL2E3 Elective-III
PVL2L2 VLSI Design Lab-II

Semester III:

PVL3E4 Elective-IV
PVL3E5 Elective-V
PVL3E6 Elective-VI
PVL3P1 Project Work Phase I

Semester IV:

PVL4P2 Project Work Phase II

Achievements for this centre

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