MS VSDV (VLSI)

Master

In Manipal

Price on request

Description

  • Type

    Master

  • Location

    Manipal

  • Duration

    2 Years

Facilities

Location

Start date

Manipal (Karnātaka)
See map
IV Floor, Innovation Centre, MIT Campus, Manipal, 576104

Start date

On request

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Course programme

Manipal University in association with Axiom Design Automation, Bangalore (One of the leading EDA Solution provider) offers four semester postgraduate course in “VLSI System Design & Verification” to address current emerging technologies. The MS programme is a step towards making technical learning very practical and relevant.

Semester I

Digital Systems Design
Verification & Scripting

Linux & Data Structures
Digital Systems Design Lab
Seminar - I
Project – I

Semester II

Elective
Elective Lab
Seminar - II
Project -II

III & IV SEMESTER

Project Work

Electives
Advanced VLSI Design
Physical Design
Signal Processing

MS VSDV (VLSI)

Price on request