B.E. Computer Science & Engineering:VLSI Testing

Thapar University
In Patiala

Price on request
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Important information

Typology Bachelor
Location Patiala
Duration 4 Years
  • Bachelor
  • Patiala
  • Duration:
    4 Years


Where and when

Starts Location
On request
Thapar University P.O Box 32, 147004, Punjab, India
See map
Starts On request
Thapar University P.O Box 32, 147004, Punjab, India
See map

Course programme

First Year: Semester I

Mathematics I
Engineering graphics
Computer Programming
Solid Mechanics
Communication Skill

First Year: Semester-II

Mathematics II
Manufacturing Process
Electrical and Electronic Science
Organizational Behavior

Second Year- Semester - I

Measurement Science and Techniques
Optimization Techniques
Semiconductor Devices
Data Structures
Discrete Mathematical Structures
Digital Electronic Circuits
Human Values, Ethics and IPR

Second Year- Semester – II

Numerical and Statistical Methods
Electrical Engineering Materials
Computer System Architecture
Principles of Programming Languages
Analysis and Design of Information Systems
Operating Systems
Environmental Studies

Third Year- Semester – I

Object Oriented Programming
Theory of Computation
Computer Networks
Data Base Management Systems
Software Engineering
Summer Training

Third Year- Semester – II

Total Quality Management
Algorithm Analysis and Design
Software Project Management
Internet and Web Technologies

Fourth Year- Semester – I

Engineering Economics
System Software
Compiler Construction
Computer Graphics
Artificial Intelligence

Fourth Year- Semester – II

Project Semester
Industrial Training(6 weeks)

VLSI Testing

VLSI Testing: Define, Need for VLSI Testing, Scopes of VLSI Testing, Analog and Digital Testing Combinational vs Sequential Testing, Observability and Controllability, Fault coverage, Testing complexity and Testing cost.

Physical defects and Fault Models: Functional defects, Parametric defects, Stuck at faults, Bridging Faults, Fault collapsing, Delay Faults.

Introduction to various Testing methods: On line and off line Testing, Exhaustive and Random test generation, Algorithmic approaches, Heuristic approach, Equality Checking, Compaction, Signature Analysis and Concurrent checking.

Test Generation algorithms: Definition, concepts and implementation of Test Generation Algorithms: D-Algorithm, Boolean Difference, PODEM and ATPG. Comparison of various Test Generation algorithms.

Design Strategies for Testing: Ad-Hoc Testing, Scan Based Testing (LSSD) and Self-Testing Techniques (BILBO).

Recent trends in VLSI Testing: Genetic Algorithms, Parallel Algorithms, Neural networks, nano scale Testing.

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