B.E. Electronics(Instrumentation Control):VLSI CAD

Thapar University
In Patiala

Price on request
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Important information

Typology Bachelor
Location Patiala
Duration 4 Years
  • Bachelor
  • Patiala
  • Duration:
    4 Years

Where and when
Starts Location
On request
Thapar University P.O Box 32, 147004, Punjab, India
See map
Starts On request
Thapar University P.O Box 32, 147004, Punjab, India
See map

Course programme

First Year: Semester I

Mathematics I
Engineering graphics
Computer Programming
Solid Mechanics
Communication Skills

First year: Semester II

Mathematics II
Manufacturing Process
Electrical and Electronic Science
Organizational Behavior

Second year: Semester I

Electromagnetic Fields
Human Values, Ethics and IPR
Semiconductor Devices
Measurement Science and Techniques
Circuit Theory
Digital Electronic Circuits
Electrical Machines

Second year: Semester II

Fluid Mechanics
Computer System Architecture
Optimization Techniques
Analog Electronic Circuits
Numerical and Statistical Methods
Electrical and Electronic Measurements
Environmental Studies

Third year: Semester I

Elements and Analysis of Instrumentation System
Analytical Instrumentation
Signals and Systems
Power Electronics
Biomedical instrumentation
Summer Training

Third year: Semester II

Data Acquisition Systems
Industrial Measurements
Process Dynamics and Control
Control Systems
Total Quality Management

Fourth year: Semester I

Advance Process Control
Virtual Instrumentation
Instrumentation System Design
Engineering Economics
Microelectronics and ICs

Fourth year: Semester II

Project Semester
Industrial Training(6 weeks)


Complexity of VLSI chips and trends in IC industry, VLSI design cycle, VLSI Design Flow, Y-Chart: Design abstractions using Behavioral, Structural and Physical domains, role of CAD tools in VLSI Design Automation.

Common algorithmic approaches used in VLSI Design Automation, Greedy methods, Stochastic search, Graph theoritic methods, Dynamic Programming; Optimization Algorithms: Simulated Annealing, Genetic Algorithm and Neural models.

VLSI Physical Design Automation: Algorithms for Partitioning, Floor planning, Placement Routing: Grid Routing, Channel Routing, Global routing, Layout compaction and verification, DRC checks.

Design Verification using Logic Simulation: Compiled code and Event- driven simulation Algorithms, Silicon Compilers

VLSI Design Styles: Standard IC, ASICs

Recent topics in VLSI CAD: Reconfigurable Computing, Embedded System concepts, Hardware Software Co-design, High-Level Synthesis and VHDL modeling.

Laboratory work: Working with layout editor, Implementation of Algorithms used for VLSI Design, logic simulation algorithms, Optimization algorithms- greedy methods, simulated annealing, genetic algorithm and neural models.

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