M.E in VLSI Design(Part Time)

Master

In Chennai

Price on request

Description

  • Type

    Master

  • Location

    Chennai

  • Duration

    3 Years

Facilities

Location

Start date

Chennai (Tamil Nādu)
See map
Sardar Patel Road. Chennai, 600025

Start date

On request

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Course programme

Semester I:

Applied Mathematics for Electronics Engineers
Modern Digital Communication Techniques
Advanced Digital Signal Processing

Semester II:

Analysis and Design of Analog Integrated Circuits
Computer Aided Design of VLSI Circuits
Computer Architecture and Parallel Processing

Semester III:

VLSI Design Techniques
Solid State Device Modeling and Simulation
Elective I

Semester IV:
Embedded Systems
Elective II
Elective III

Semester V:

Elective IV
Elective V
Elective VI

Semester VI:

Project Work - Phase II

M.E in VLSI Design(Part Time)

Price on request