VLSI Design Training in Kolkata
Training
In Salt Lake
Description
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Type
Training
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Location
Salt lake
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Duration
Flexible
Suitable for: Electronics Engineers
Facilities
Location
Start date
Start date
Reviews
Course programme
VLSI Design : Module - EDA Tools (Back End VLSI)
- Overview of VLSI Systems
- Basic CMOS Structure
- CMOS Fabrication
- VLSI Process, VLSI Design
- VLSI design Rules & System Layout
- Introduction of EDA Tools for VLSI
- Using EDA Tools for VLSI
VLSI Design : Hardware Description Language :VHDL(Front End VLSI)
- Introduction
- Structural VHDL
- Behavioral VHDL
- RTL Code
- Data Type
- Configuration & Package
- VHDL Library Management
- VHDL Simulation & Synthesis Flow
- VHDL synthesizable code for Logic Components (Combinational & Sequential)
- Delay Simulation
- Timing Analysis
- Test Bench Creation
- FPGA Synthesis
VLSI Design : Hardware Description Language :Verilog (Front End VLSI)
- Basics of Verilog
- Logic Value Systems
- Data Types
- Hardware Modeling
- Continious Assignment Statement
- Procedural Assignment Statement
- Logical Operators
- Arithmetic Operations
- Relational, Equality, Shift Operator
- Conditional Expression
- If / Case / Loop statement
- Modeling Examples of Combinational & Sequential Circuit
- Optimization
- Testing & Verivication
- FPGA Synthesis
- Overview of VLSI Systems
- Basic CMOS Structure
- CMOS Fabrication
- VLSI Process
- VLSI Design
- VLSI design Rules & System Layout
- Introduction of EDA Tools for VLSI
- Using EDA Tools for VLSI
- Learning VHDL / Verilog
- Introduction to FPGA
- FPGA Architecture
- EDA tool for FPGA
- Working with Xilinx FPGA kit
- Simulation
- Synthesis
- Report Analysis
- Bit File Generation
- Actual Implementation on FPGA using UCF file Creation
- Actual Hardware System Optimization, Testing & Verification
Excellent Projects available on VLSI / VHDL / Verilog / FPGA for B.E/B.Tech/M.Sc./Diploma students.
VLSI Design Training in Kolkata